A central processing unit (CPU) of an information processing device executes a self-diagnostic program called a power on self test (POST) at the time of power-on or reset execution. The POST detects a failure of hardware installed in the information processing device and notifies a service processor (SVP) of information about the detected failure.
When the POST is executed, a main memory device is not yet initialized. Thus, the service processor stores the failure information generated by the POST in a storage device, such as a static random access memory (SRAM) or a CPU cache, which is available without being initialized.
As a method of storing data in a memory that stores therein an address table, there is known a method of dynamically changing the boundary of areas for address information with high reference frequency and address information with low reference frequency to effectively use the memory.
As a method of storing a log in a storage device, there is known a method of storing new log information by removing a log with a lowest priority when a second storage area, which is to be secured when a first storage area runs out of free space, is not available.
Related techniques are disclosed in, for example, Japanese Laid-open Patent Publication No. 2000-278308 and Japanese Laid-open Patent Publication No. 2008-225599.
The storage device such as an SRAM or a CPU cache, which stores therein failure information, is available without being initialized, but has a small capacity.